Hardware Description Language (HDL) allows analysis and simulation of digital logic and circuits. The HDL is an integral part of the EDA (electronic design automation) tool for PLDs, microprocessors, and ASICs. So, HDL is used to describe a Digital System. The combinational and sequential logic circuits can be described easily using HDL. Verilog HDL, standardized as IEEE 1364, is a hardware description language used to model electronic systems.
This book is a comprehensive guide about the digital system and its design using various VLSI design tools as well as Verilog HDL. The step-wise procedure to use various VLSI tools such as Xilinx, Vivado, Cadence NC-SIM, is covered in this book. It also explains the advanced concept such as User Define Primitives (UDP), switch level modeling, reconfigurable computing, etc. Finally, this book ends with FPGA based prototyping of the digital system.
By the end of this book, you will understand everything related to digital system design.
Get familiar and work with the basic and advanced Modeling types in Verilog HDL
- Learn about the step-wise process to use Verilog design tools such as Xilinx, Vivado, Cadence NC-SIM
- Explore the various types of HDL and its need
- Learn Verilog HDL modeling types using examples
- Learn advanced concept such as UDP, Switch level modeling
- Learn about FPGA based prototyping of the digital system
What Will You Learn
- Implement Adder, Subtractor, Adder-Cum-Subtractor using Verilog HDL
- Explore the various Modeling styles in Verilog HDL
- Implement Switch level modeling using Verilog HDL
- Get familiar with advanced modeling techniques in Verilog HDL
- Get to know more about FPGA based prototyping using Verilog HDL
Who This Book is For
Anyone interested in Electronics and VLSI design and want to learn Digital System Design with Verilog HDL will find this book useful. IC developers can also use this book as a quick reference for Verilog HDL fundamentals & features.
- An Introduction to VLSI Design Tools
- Need of Hardware Description Language (HDL)
- Logic Gate Implementation in Verilog HDL
- Adder-Subtractor Implementation Using Verilog HDL
- Multiplexer/Demultiplexer Implementation in Verilog HDL
- Encoder/Decoder Implementation Using Verilog HDL
- Magnitude Comparator Implementation Using Verilog HDL
- Flip-Flop Implementation Using Verilog HDL
- Shift Registers Implementation Using Verilog HDL
- Counter Implementation Using Verilog HDL
- Shift Register Counter Implementation Using Verilog HDL
- Advanced Modeling Techniques
- Switch Level Modeling
- FPGA Prototyping in Verilog HDL
Dr. Cherry Bhargava is working as an associate professor and head, VLSI domain, School of Electrical and Electronics Engineering at Lovely Professional University, Punjab, India. She has more than 14 years of teaching and research experience. She is Ph.D. (ECE), IKGPTU, M.Tech (VLSI Design & CAD) Thapar University and B.Tech (Electronics and Instrumentation) from Kurukshetra University. She is GATE qualified with All India Rank 428.
She has authored about 50 technical research papers in SCI, Scopus indexed quality journals, and national/international conferences. She has eleven books related to reliability, artificial intelligence, and digital electronics to her credit. She has registered five copyrights and filed twenty-two patents. She is the recipient of various national and international awards for being outstanding faculty in engineering and excellent researcher. She is an active reviewer and editorial member of various prominent SCI and Scopus indexed journals. She is a lifetime member of IET, IAENG, NSPE, IAOP, WASET, and reliability research group. Her area of expertise includes the reliability of electronic systems, digital electronics, VLSI design, artificial intelligence, and related technologies.
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Dr. Rajkumar Sarma received his B.E. in Electronics and Communications Engineering from Vinayaka Mission’s University, Salem, India & M.Tech degree from Lovely Professional University, Phagwara, Punjab and currently pursuing Ph.D. from Lovely Professional University, Phagwara, Punjab. He is an Assistant Professor in the School of Electronics and Electrical Engineering, Lovely Professional University, Punjab, since July 2012. His research interests include analog and Digital VLSI design, Prototype development using FPGA, etc. The author has around 20+ research publications in reputed Journals/Conferences & 15 patents published.
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